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naive_3Hz_stopwatch

tut4-with-strobe

tdc_manual_start_stop_uart_tx

tdc_uart_tx

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• 2cbbe090ed another uart demonstration: uart echo module master Nam Tran 2021-05-30 15:19:08 -05:00
• 99a8661faa calib delay? Nam Tran 2020-12-16 15:01:39 -06:00
• e7a23afcb0 use 3-bit transmit state, add header/footer around data, skip debounce for now tdc_uart_tx tdc_manual_start_stop_uart_tx Nam Tran 2020-11-02 15:49:11 -06:00
• 45f845f671 can transmit data out, but in wrong order ... Nam Tran 2020-11-01 09:30:46 -06:00
• aeaf18c2d4 skip debounce in simulation Nam Tran 2020-10-30 17:52:42 -05:00
• ec6b3431be uart tx using zipcpu tut5 code Nam Tran 2020-10-27 14:50:10 -05:00
• 568775a169 indent Nam Tran 2020-10-27 10:39:56 -05:00
• 5a58da34af move debouncing parts to top module Nam Tran 2020-10-27 07:50:25 -05:00
• 92f059ab54 use only top bits of the data to display Nam Tran 2020-10-26 22:45:17 -05:00
• 124d1fff63 add debouncing buttons before start/stop Nam Tran 2020-10-26 22:33:44 -05:00
• c6cc9bc99f change divison factor in clk_gen for 100 MHz Nam Tran 2020-10-26 22:00:42 -05:00
• 61bab9153d hack to use PLL in synthesizing, and fake 100 MHz on verilator Nam Tran 2020-10-26 21:58:13 -05:00
• f36bb84065 add pin photos naive_3Hz_stopwatch Nam Tran 2020-10-26 18:10:42 -05:00
• a0b211338c working stop watch Nam Tran 2020-10-26 17:35:52 -05:00
• 4886fad4b2 tdc state machine Nam Tran 2020-10-26 16:06:00 -05:00
• 74dd3fb1d8 resume with the TDC Nam Tran 2020-10-25 22:49:43 -05:00
• 240b6e26d4 minimal change from https://zipcpu.com/tutorial/ex-04-reqwalker.tgz Nam Tran 2020-10-25 22:09:23 -05:00
• 3a9c0343c1 use 1 Hz clock for visible walking Nam Tran 2020-10-25 21:38:28 -05:00
• 4e192d5d70 remove strobe parts since it is on its own branch Nam Tran 2020-10-25 20:37:32 -05:00
• 556a79e705 tut4 with strobe, stuck at the last transition tut4-with-strobe Nam Tran 2020-10-25 17:55:16 -05:00
• 6096187250 tut4 with busy and request Nam Tran 2020-10-24 14:29:44 -05:00
• 0a724d30d0 make sure the verification works Nam Tran 2020-10-23 19:27:49 -05:00
• 5f18f8f88c formal verification stuff Nam Tran 2020-10-23 19:09:57 -05:00
• e284e518ed led walker Nam Tran 2020-10-23 15:50:04 -05:00
• 66010c90d9 assign reg in always block Nam Tran 2020-10-23 15:18:09 -05:00
• 70d8ea268e simulate a few more cycles Nam Tran 2020-10-23 15:05:41 -05:00
• 400ebbb9aa shift right as well Nam Tran 2020-10-23 14:50:34 -05:00
• 45160b50a9 add tut3 folder, shift register code works Nam Tran 2020-10-23 14:42:07 -05:00
• 3a3830b443 tweaks in tut 2 Nam Tran 2020-10-23 12:48:46 -05:00
• 12829a3e9c add clock constraint, amend Makefile Nam Tran 2020-10-23 11:49:21 -05:00
• 42c5b8a47f timescale in verilator command Nam Tran 2020-10-23 10:16:04 -05:00
• f9b7340667 change width in blinky sim Nam Tran 2020-10-23 09:52:03 -05:00
• 9fe8d26364 little improvement on Makefile Nam Tran 2020-10-22 22:15:18 -05:00
• 7bb2d41932 create a dummy clock gen, can include it in both sim and synth Nam Tran 2020-10-22 21:58:42 -05:00
• 1198429d53 new project for tdc, copied code from blinky and changed structure Nam Tran 2020-10-22 21:28:17 -05:00
• ccdfe6da64 blinky_with_pll, works on hardware but verilator does not know how to handle the SB40_PLL_CORE yet Nam Tran 2020-10-19 22:25:27 -05:00
• 08ff4b2dbb blinky on icefun Nam Tran 2020-10-12 21:04:59 -05:00