nam
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  • Joined on 2020-10-02
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nam pushed to master at nam/iceFun_Projects 2020-12-16 14:01:42 -07:00
99a8661faa calib delay?
nam pushed tag v1.0.0 to nam/zynq_readout_cpp 2020-11-24 21:25:02 -07:00
nam pushed to master at nam/zynq_readout_cpp 2020-11-24 21:23:11 -07:00
b8550dee70 ready to check missing trigger
78fc7cb184 move function around
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nam pushed to master at nam/zynq_readout_cpp 2020-11-24 17:42:44 -07:00
57443a5c26 channel carries board info
a561e6b428 set up log files
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nam pushed to master at nam/zynq_readout_cpp 2020-11-24 16:53:53 -07:00
14070f8017 move completely to spdlog, refactor channel class
4a692fc42f remove loguru artifact from Makefile
7501c9ff77 remove loguru
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nam pushed to master at nam/zynq_readout_cpp 2020-11-24 10:49:59 -07:00
3c6f2cbeb4 add channel header
nam pushed to master at nam/zynq_readout_cpp 2020-11-05 07:41:01 -07:00
325fafde03 channel processing works correctly (without adc block)
nam pushed to master at nam/zynq_readout_cpp 2020-11-04 21:12:59 -07:00
f0e4c1adce first step of channel parsing
nam pushed to master at nam/zynq_readout_cpp 2020-11-04 19:42:41 -07:00
b8c754b651 replace all cout with log_f
b9f5c2f405 add submodule
5cf14e3652 socket read with timeout, logging
nam created repository nam/zynq_readout_cpp 2020-11-04 19:29:30 -07:00
nam pushed tag tdc_manual_start_stop_uart_tx to nam/iceFun_Projects 2020-11-02 15:49:14 -07:00
nam pushed tag tdc_uart_tx to nam/iceFun_Projects 2020-11-02 14:50:09 -07:00
nam pushed to master at nam/iceFun_Projects 2020-11-02 14:49:16 -07:00
e7a23afcb0 use 3-bit transmit state, add header/footer around data, skip debounce for now
nam pushed to master at nam/iceFun_Projects 2020-11-01 08:30:51 -07:00
45f845f671 can transmit data out, but in wrong order ...
aeaf18c2d4 skip debounce in simulation
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nam pushed to master at nam/iceFun_Projects 2020-10-27 13:50:23 -06:00
ec6b3431be uart tx using zipcpu tut5 code
nam pushed to master at nam/iceFun_Projects 2020-10-27 09:39:58 -06:00
568775a169 indent
nam pushed to master at nam/iceFun_Projects 2020-10-27 06:58:39 -06:00
5a58da34af move debouncing parts to top module
nam pushed to master at nam/iceFun_Projects 2020-10-26 21:45:21 -06:00
92f059ab54 use only top bits of the data to display
124d1fff63 add debouncing buttons before start/stop
c6cc9bc99f change divison factor in clk_gen for 100 MHz
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nam pushed to master at nam/iceFun_Projects 2020-10-26 20:58:18 -06:00
61bab9153d hack to use PLL in synthesizing, and fake 100 MHz on verilator
nam pushed to naive_3Hz_stopwatch at nam/iceFun_Projects 2020-10-26 17:56:27 -06:00