This website requires JavaScript.
Explore
Help
Register
Sign In
nam
/
iceFun_Projects
Watch
1
Star
0
Fork
0
You've already forked iceFun_Projects
Code
Issues
Pull Requests
Projects
Releases
Wiki
Activity
27
Commits
3
Branches
2
Tags
124d1fff635b63ad69fac6d705b4aa1c73354fab
Commit Graph
3 Commits
Author
SHA1
Message
Date
Nam Tran
61bab9153d
hack to use PLL in synthesizing, and fake 100 MHz on verilator
2020-10-26 21:58:13 -05:00
Nam Tran
a0b211338c
working stop watch
2020-10-26 17:35:52 -05:00
Nam Tran
7bb2d41932
create a dummy clock gen, can include it in both sim and synth
2020-10-22 21:58:42 -05:00