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skip debounce in simulation

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Nam Tran
2020-10-30 17:52:42 -05:00
parent ec6b3431be
commit aeaf18c2d4
2 changed files with 50 additions and 37 deletions
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64
tdc/rtl/top.v
View File

@@ -21,38 +21,44 @@ module top #(parameter WIDTH=24)(
assign o_dataN = ~buf_data[TDC_COUNTER_WIDTH-1:TDC_COUNTER_WIDTH-6]; assign o_dataN = ~buf_data[TDC_COUNTER_WIDTH-1:TDC_COUNTER_WIDTH-6];
/* verilator lint_on UNUSED */ /* verilator lint_on UNUSED */
/* verilator lint_off PINMISSING */ /* verilator lint_off PINMISSING */
clk_gen #(.DIVISION(26)) clk_gen0 ( clk_gen #(.DIVISION(26)) clk_gen0 (
.o_div_clk (clk_1Hz), .o_div_clk (clk_1Hz),
.o_clk_100MHz (clk_100MHz), .o_clk_100MHz (clk_100MHz),
.i_clk (i_clk)); .i_clk (i_clk));
/* verilator lint_on PINMISSING */ /* verilator lint_on PINMISSING */
reg db_start, db_stop;
reg db_start, db_stop; `ifdef VERILATOR
debounce db1 ( always @(posedge clk_100MHz) begin
// Outputs db_start <= ~i_startN;
.db (db_start), db_stop <= ~i_stopN;
// Inputs end
.clk (clk_100MHz), `else
.reset (~i_resetN), debounce db1 (
.sw (~i_startN)); // Outputs
debounce db2 ( .db (db_start),
// Outputs // Inputs
.db (db_stop), .clk (clk_100MHz),
// Inputs .reset (~i_resetN),
.clk (clk_100MHz), .sw (~i_startN));
.reset (~i_resetN), debounce db2 (
.sw (~i_stopN)); // Outputs
.db (db_stop),
// Inputs
.clk (clk_100MHz),
.reset (~i_resetN),
.sw (~i_stopN));
`endif
tdc #(.COUNTER_WIDTH(TDC_COUNTER_WIDTH)) tdc0 ( tdc #(.COUNTER_WIDTH(TDC_COUNTER_WIDTH)) tdc0 (
// Outputs // Outputs
.o_ready (buf_ready), .o_ready (buf_ready),
.o_data (buf_data), .o_data (buf_data),
// Inputs // Inputs
.i_clk (clk_100MHz), .i_clk (clk_100MHz),
.i_start (db_start), .i_start (db_start),
.i_stop (db_stop), .i_stop (db_stop),
.i_reset (~i_resetN)); .i_reset (~i_resetN));
always @(posedge clk_1Hz) begin always @(posedge clk_1Hz) begin
buf_led <= ~buf_led; buf_led <= ~buf_led;

23
tdc/sim/top.cc
View File

@@ -32,6 +32,7 @@ int main(int argc, char **argv) {
tb->trace(tfp, 00); tb->trace(tfp, 00);
tfp->open("build/waveform.vcd"); tfp->open("build/waveform.vcd");
// initial state
tb->i_resetN = 1; tb->i_resetN = 1;
tb->i_startN = 1; tb->i_startN = 1;
tb->i_stopN = 1; tb->i_stopN = 1;
@@ -39,6 +40,7 @@ int main(int argc, char **argv) {
for (int k = 0; k < 2; k++) for (int k = 0; k < 2; k++)
tick(++tickcount, tb, tfp); tick(++tickcount, tb, tfp);
// reset pulse, then wait for a few clock cycles
tb->i_resetN = 0; tb->i_resetN = 0;
tick(++tickcount, tb, tfp); tick(++tickcount, tb, tfp);
tb->i_resetN = 1; tb->i_resetN = 1;
@@ -46,21 +48,26 @@ int main(int argc, char **argv) {
for (int k = 0; k < 3; k++) for (int k = 0; k < 3; k++)
tick(++tickcount, tb, tfp); tick(++tickcount, tb, tfp);
for (int i = 0; i < 1000; i++) { // relevant const
tb->i_startN = 0; const unsigned int main_clk_Hz = 100 * 1000 * 1000; // 100 MHz
tick(++tickcount, tb, tfp); const unsigned int db_clk_Hz = 10; // 10 ms -> 10 Hz
tb->i_startN = 1; const unsigned int db_ticks = main_clk_Hz / db_clk_Hz;
tick(++tickcount, tb, tfp);
}
for (int k = 0; k < 15; k++) // start pulse
tb->i_startN = 0;
tick(++tickcount, tb, tfp);
tb->i_startN = 1;
for (int k = 0; k < 394; k++)
tick(++tickcount, tb, tfp); tick(++tickcount, tb, tfp);
// stop pulse
tb->i_stopN = 0; tb->i_stopN = 0;
tick(++tickcount, tb, tfp); tick(++tickcount, tb, tfp);
tb->i_stopN = 1; tb->i_stopN = 1;
for (int k = 0; k < 3; k++) for (int k = 0; k < 30; k++)
tick(++tickcount, tb, tfp); tick(++tickcount, tb, tfp);
tb->i_resetN = 0; tb->i_resetN = 0;