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iceFun_Projects
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nam
08ff4b2dbb
blinky on icefun
2020-10-12 21:04:59 -05:00
blinky
blinky on icefun
2020-10-12 21:04:59 -05:00
.gitignore
blinky on icefun
2020-10-12 21:04:59 -05:00
S
Description
Projects with iceFun FPGA, written in Verilog, simulated with Verilator
backup
fpga
hx8k
ice
icefun
zipcpu
266
KiB
Languages
Verilog
69.5%
Makefile
18%
C++
12.2%
Python
0.3%