blinky_with_pll, works on hardware but verilator does not know how to handle the SB40_PLL_CORE yet

This commit is contained in:
2020-10-19 22:25:27 -05:00
parent 08ff4b2dbb
commit ccdfe6da64
6 changed files with 156 additions and 0 deletions

22
blinky_with_pll/blinky.v Normal file
View File

@@ -0,0 +1,22 @@
`default_nettype none
module blinky(o_led, lcol1, sysclk);
parameter WIDTH = 24;
output wire o_led;
output wire lcol1;
input wire sysclk;
wire clk_100MHz;
wire locked;
pll_100MHz pll_0 (.clock_in(sysclk), .clock_out(clk_100MHz), .locked(locked));
reg [WIDTH-1:0] counter;
always @(posedge clk_100MHz)
counter <= counter + 1'b1;
assign o_led = counter[WIDTH-1];
assign lcol1 = 1'b0;
endmodule