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use 3-bit transmit state, add header/footer around data, skip debounce for now

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Nam Tran
2020-11-02 15:49:11 -06:00
parent 45f845f671
commit e7a23afcb0
2 changed files with 16 additions and 16 deletions
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30
tdc/rtl/top.v
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@@ -27,13 +27,11 @@ module top #(parameter WIDTH=24)(
.i_clk (i_clk)); .i_clk (i_clk));
/* verilator lint_on PINMISSING */ /* verilator lint_on PINMISSING */
reg db_start, db_stop; reg db_start, db_stop;
// skipping the debouncing in simulation
`ifdef VERILATOR
always @(posedge clk_100MHz) begin always @(posedge clk_100MHz) begin
db_start <= ~i_startN; db_start <= ~i_startN;
db_stop <= ~i_stopN; db_stop <= ~i_stopN;
end end
`else `ifdef DEBOUNCE
debounce db1 ( debounce db1 (
// Outputs // Outputs
.db (db_start), .db (db_start),
@@ -50,7 +48,7 @@ module top #(parameter WIDTH=24)(
.sw (~i_stopN)); .sw (~i_stopN));
`endif `endif
tdc #(.COUNTER_WIDTH(TDC_COUNTER_WIDTH)) tdc0 ( tdc #(.COUNTER_WIDTH(32)) tdc0 (
// Outputs // Outputs
.o_ready (buf_ready), .o_ready (buf_ready),
.o_data (buf_data), .o_data (buf_data),
@@ -81,21 +79,21 @@ module top #(parameter WIDTH=24)(
reg [7:0] tx_data; reg [7:0] tx_data;
// there are 4bytes to transmit // there are 4bytes to transmit
initial tx_index = 3'h0; initial tx_index = 3'd0;
always @(posedge clk_100MHz) begin always @(posedge clk_100MHz) begin
if ((tx_stb)&&(!tx_busy)) begin if ((tx_stb)&&(!tx_busy))
if (tx_index < 3'd4) tx_index <= tx_index + 1'b1;
tx_index <= tx_index + 1'b1;
else
tx_index <= 0;
end
end end
always @(posedge clk_100MHz) begin always @(posedge clk_100MHz) begin
case(tx_index) case(tx_index)
3'd1: tx_data <= buf_data[31:24]; 3'd0: tx_data <= "f";
3'd2: tx_data <= buf_data[23:16]; 3'd1: tx_data <= "f";
3'd3: tx_data <= buf_data[15:8]; 3'd2: tx_data <= buf_data[31:24];
3'd4: tx_data <= buf_data[7:0]; 3'd3: tx_data <= buf_data[23:16];
3'd4: tx_data <= buf_data[15:8];
3'd5: tx_data <= buf_data[7:0];
3'd6: tx_data <= "f";
3'd7: tx_data <= "f";
endcase endcase
end end
initial tx_stb = 1'b0; initial tx_stb = 1'b0;
@@ -103,7 +101,7 @@ module top #(parameter WIDTH=24)(
always @(posedge clk_100MHz) begin always @(posedge clk_100MHz) begin
if (tx_start) if (tx_start)
tx_stb <= 1'b1; tx_stb <= 1'b1;
else if ((tx_stb)&&(!tx_busy)&&(tx_index==3'd4)) else if ((tx_stb)&&(!tx_busy)&&(tx_index==3'd7))
tx_stb <= 1'b0; tx_stb <= 1'b0;
end end

2
tdc/sim/top.cc
View File

@@ -61,6 +61,8 @@ int main(int argc, char **argv) {
for (int k = 0; k < 394; k++) for (int k = 0; k < 394; k++)
tick(++tickcount, tb, tfp); tick(++tickcount, tb, tfp);
for (int k = 0; k < (1<<17); k++)
tick(++tickcount, tb, tfp);
// stop pulse // stop pulse
tb->i_stopN = 0; tb->i_stopN = 0;