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Nam Tran
2020-10-27 10:39:56 -05:00
parent 5a58da34af
commit 568775a169
1 changed files with 2 additions and 2 deletions
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4
tdc/rtl/clk_gen.v
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@@ -8,7 +8,7 @@ module clk_gen #(parameter DIVISION=22)(
/* verilator lint_off PINCONNECTEMPTY */ /* verilator lint_off PINCONNECTEMPTY */
/* verilator lint_off PINMISSING */ /* verilator lint_off PINMISSING */
reg [DIVISION-1:0] counter = 0; reg [DIVISION-1:0] counter = 0;
`ifdef VERILATOR `ifdef VERILATOR
always @(posedge i_clk) begin always @(posedge i_clk) begin
counter <= counter + 1; counter <= counter + 1;
@@ -22,7 +22,7 @@ module clk_gen #(parameter DIVISION=22)(
end end
`endif `endif
assign o_div_clk = counter[DIVISION-1]; assign o_div_clk = counter[DIVISION-1];
/* verilator lint_on PINCONNECTEMPTY */ /* verilator lint_on PINCONNECTEMPTY */
/* verilator lint_on PINMISSING */ /* verilator lint_on PINMISSING */
endmodule endmodule