use 1 Hz clock for visible walking
This commit is contained in:
@@ -8,11 +8,11 @@ module top(i_clk, o_led, o_led_row_0, i_request, o_busy);
|
||||
input wire i_request;
|
||||
output wire o_busy;
|
||||
|
||||
wire clk_12MHz;
|
||||
wire clk_1Hz;
|
||||
|
||||
clk_gen clk_gen_0 (/*autoinst*/
|
||||
// Outputs
|
||||
.o_clk (clk_12MHz),
|
||||
.o_clk (clk_1Hz),
|
||||
// Inputs
|
||||
.i_clk (i_clk));
|
||||
|
||||
@@ -34,21 +34,21 @@ module top(i_clk, o_led, o_led_row_0, i_request, o_busy);
|
||||
busy_buf = 0;
|
||||
end
|
||||
|
||||
always @(posedge clk_12MHz) begin
|
||||
always @(posedge clk_1Hz) begin
|
||||
if (!busy_buf && req_buf)
|
||||
busy_buf <= 1;
|
||||
else
|
||||
busy_buf <= (state != 4'h0);
|
||||
end
|
||||
// counter and strobe run only during busy signal is High
|
||||
always @(posedge clk_12MHz) begin
|
||||
always @(posedge clk_1Hz) begin
|
||||
if (busy_buf)
|
||||
counter <= counter + 1'b1;
|
||||
else
|
||||
counter <= 0;
|
||||
end
|
||||
|
||||
always @(posedge clk_12MHz) begin
|
||||
always @(posedge clk_1Hz) begin
|
||||
if (!busy_buf && req_buf)
|
||||
state <= 4'h1;
|
||||
else if (state >= 4'hB)
|
||||
@@ -58,7 +58,7 @@ module top(i_clk, o_led, o_led_row_0, i_request, o_busy);
|
||||
end
|
||||
|
||||
// fsm for led_buf
|
||||
always @(posedge clk_12MHz) begin
|
||||
always @(posedge clk_1Hz) begin
|
||||
case (state)
|
||||
4'h1: led_buf <= 6'b00_0001;
|
||||
4'h2: led_buf <= 6'b00_0010;
|
||||
|
||||
Reference in New Issue
Block a user