formal verification stuff

2020-10-23 19:09:57 -05:00
parent e284e518ed
commit 5f18f8f88c
3 changed files with 58 additions and 2 deletions
--- a/fsm/sim/top.sby
+++ b/fsm/sim/top.sby
@@ -0,0 +1,13 @@
+[options]
+mode prove
+
+[engines]
+smtbmc
+
+[script]
+read -formal *.v
+prep -top top
+
+[files]
+rtl/top.v
+rtl/clk_gen.v