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Add experimental double FPS mode for OV2640

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Allows for 52fps@CIF, 26fps@SVGA and 6.5fps@UXGA (unchanged) when XCLK is set to 10MHz
This commit is contained in:
me-no-dev
2019-01-26 21:33:23 +01:00
parent 165a47fe6a
commit 10b3d3c2a9
6 changed files with 17 additions and 2 deletions
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9
sensors/ov2640.c
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@@ -241,6 +241,15 @@ static int set_framesize(sensor_t *sensor, framesize_t framesize)
WRITE_REG_OR_RETURN(BANK_DSP, R_BYPASS, R_BYPASS_DSP_BYPAS);
WRITE_REGS_OR_RETURN(regs);
if (sensor->xclk_freq_hz == 10000000) {
if (framesize <= FRAMESIZE_CIF) {
WRITE_REG_OR_RETURN(BANK_SENSOR, CLKRC, CLKRC_2X_CIF);
} else if (framesize <= FRAMESIZE_SVGA) {
WRITE_REG_OR_RETURN(BANK_SENSOR, CLKRC, CLKRC_2X_SVGA);
} else {
WRITE_REG_OR_RETURN(BANK_SENSOR, CLKRC, CLKRC_2X_UXGA);
}
}
WRITE_REG_OR_RETURN(BANK_DSP, ZMOW, (w>>2)&0xFF); // OUTW[7:0] (real/4)
WRITE_REG_OR_RETURN(BANK_DSP, ZMOH, (h>>2)&0xFF); // OUTH[7:0] (real/4)
WRITE_REG_OR_RETURN(BANK_DSP, ZMHH, ((h>>8)&0x04)|((w>>10)&0x03)); // OUTH[8]/OUTW[9:8]

3
sensors/private_include/ov2640_regs.h
View File

@@ -209,5 +209,8 @@ typedef enum {
#define REG32_CIF 0x89
#define CLKRC_2X 0x80
#define CLKRC_2X_UXGA (0x01 | CLKRC_2X)
#define CLKRC_2X_SVGA CLKRC_2X
#define CLKRC_2X_CIF CLKRC_2X
#endif //__REG_REGS_H__