====== Hardware ======
===== Overview =====
The box's job is to emit TTL pulses to control 4 HV pulsers, and stop doing so when a trouble is detected.
===== Block diagram and photo =====
{{work:gm2:esq:bu_controller:bu_controller_block_diagram.png?800x0}}
===== Carrier board =====
The carrier board has a PicoZed System-On-Module (SOM), which contains:
  * a XC7Z020 System-on-Chip (one dual core ARM processor, and one Artix-7 FPGA)
  * 1 GB of DDR3 SDRAM
  * 16 GB eMMC memory
  * Ethernet interface
  * UART interface

This board serves as a bridge between user and programmable logic parts (ADC boards) of the controller.
There is a Linux system (Xilin Petalinux 2015.4) installed:
  * user: ''root''
  * password: ''root''
  * static IP address: ''192.168.30.89''
===== ADC boards =====
There are 4 identical ADC boards in the box, each has one pulser and one 8-channel waveform digitizer.
{{work:gm2:esq:bu_controller:bu_controller_front_panel.png?800x0}}
==== Pulser ====
{{work:gm2:esq:bu_controller:io_numbering.png?600x0}}

Each pulser has 8 SMA outputs, numbered from 1 to 8 from left to right:
  * outputs 1-4: RF control outputs
  * output 5: discharge signal
  * output 6: charge signal, first step
  * output 7: charge signal, second step for two-step HV cabinets. Not used in case of 1-step pulser.
  * outputs 8: spare I/O

Pulse modes are:
  - External trigger: produces a set of pulse after receiving a LVTTL (3.3 V) logic pulse at the external trigger input. The trigger pulse width should not exceed 50 ns.
  - Internal trigger: produces sets of pulses periodically, up to 100 Hz

==== WFD ====
These are 12-bit WFDs, run at 100 MSPS. Clock source can be either an external 40 MHz clock, or internal clock generated by the carrier board.

The WFD inputs are numbered from 1 to 8 from left to right, similar to the pulser numbering above. These inputs have protection against surges might happen during a spark.

The WFDs provide several pieces of information:
  * waveforms: all channels are in zero-suppressed mode, which will only export samples above programmed individual threshold. The maximum sampling length is 100 us (the current firmware can only give 20 us) 
  * spark threshold (not the waveform threshold above) crossings: there are upper and lower thersholds for each channel, the threshold crossing counting is active for the whole g-2 muon fill (~700 us)
  * waveform integrals at charge and discharge times: the integration starts at charge and discharge steps, maximum integration length is 256 samples (~2.5 us)

Each WFD will produce one block of data for one trigger, the data format is described here: https://docs.google.com/spreadsheets/d/19r_blWufX368hKRkoa1FGhIzBLOzIvKfg5ZKRVmEVkI/edit?usp=sharing. The data is written to RAM on the carrier board, and can be accessed via a DMA controller.

====== Firmware ======
====== Software ======


